וובינר סינופסיס לאפיון זיכרונות משובצים יתקיים ב-3 ביוני

19 מאי, 2021

ביום ה', ה-3 ביוני 2021, תקיים סינופסיס וובינר בתחום מדידות ואפיון זיכרונות באבזרי קצה מתקדמים באמצעות פתרון Synopsys Star Memory System. ההרצאות יועברו על-ידי מומחים בכירים מסינופסיס ומ-STMicroelectronics

וובינר סינופסיס לאפיון זיכרונות משובצים יתקיים ב-3 ביוני

ביום ה', ה-3 ביוני 2021, תקיים חברת סינופסיס (Synopsys) וובינר בתחום המדידות והאיפיון של זכרונות באבזרי קצה מתקדמים, תוך שימוש בפתרון Synopsys Star Memory System של החברה. הארוע, Embedded Memories Diagnosis Flow for Advanced Technology Nodes, ייערך בשיתוף עם חברת STMicroelectronics ויתקיים בשעה 20:00 לפי שעון ישראל.

STMicroelectronics is designing complex SoCs in advanced technology nodes, containing tens of thousands of embedded memories. Many divisions at STMicroelectronics chose to use the Synopsys Star Memory System (SMS) IP for test, repair and bitmap of their most advanced products. This presentation describes the flow setup by STMicroelectronics R&D and Networking divisions to test and bitmap embedded memories using Synopsys tools SMS Yield Accelerator and Yield Explorer. A comprehensive demo will also be shown.

למידע נוסף ורישום: Embedded Memories Diagnosis

אודות הדוברים:

Dr. Yervant Zorian is a Chief Technologist and Fellow at Synopsys. Formerly, he was Vice President and Chief Scientist of Virage Logic, Chief Technologist at LogicVision, and a Distinguished Member of Technical Staff AT&T Bell Laboratories. He is currently the President of IEEE Test Technology Technical Council (TTTC), the founding chair of the IEEE 1500 Standardization Working Group and an Adjunct Professor at University of British Columbia. He served as the General Chair of the 50th Design Automation Conference (DAC), 50th IEEE International Test Conference (ITC) and several other symposia and workshops.
Dr. Zorian holds over 40 US patents, has authored five books, published over 350 refereed papers and received numerous best paper awards. A Fellow of the IEEE since 1999, Dr. Zorian was the 2005 recipient of the prestigious Industrial Pioneer Award for his contribution to BIST, and the 2006 recipient of the IEEE Hans Karlsson Award for diplomacy.
He received an MS degree in Computer Engineering from University of Southern California, a PhD in Electrical Engineering from McGill University, and an MBA from Wharton School of Business, University of Pennsylvania.

Nelly Feldman is a technical expert in Design-For-Test, Volume Diagnosis and Statistical analysis at STMicroelectronics. She has worked for 15 years in the Microcontroller Division as Design-For-Test leader. She is currently part of the R&D organization in STMicroelectronics to develop and support Volume Diagnosis and Statistical Analysis flows. She is deeply involved in the yield improvement programs of advanced CMOS/FinFet technologies. In her free time, she enjoys sports and travels. Nelly received her Master's degree in Engineering in 1999 from Marseille South of France.

Christophe Suzor is currently the application solutions manager in the Silicon Lifecyle Management (SLM) Analytics group, Chris is a chemical engineer (1992) from Australia, worked for TEL in Japan on semiconductor manufacturing equipment, then Philips semiconductors fab in Holland, before joining Electroglas in France on test equipment and yield software, and finally with Synopsys since 2005 where he helped develop the design-centric yield and diagnostics software Yield Explorer, and now works with customers globally to provide solutions for their yield and production ramp requirements.

Karen Darbinyan is a Senior Manager at Synopsys Inc based in Mountain View, CA. He specializes in embedded memory testing and embedded measurements issues. At Advanced Technology Group department, he leads STAR memory System (SMS) and STAR Hierarchical System (SHS) R&D architecture team.
Born in Yerevan, Armenia he went to school and graduated from Yerevan State Engineering University receiving his master’s degree in Computer Science.
Before joining to Synopsys at 2010, Karen also held technical leading positions at Virage Logic, Credence and Heuristic Physics Laboratories US based companies.