ביום ג' ה-4 באוגוסט 2026 בשעה 19:00 לפי שעון ישראל, תקיים חברת סינופסיס (Synopsys) את הוובינר Enabling Agile CI/CD in Chip Design: Running Synopsys EDA Flows from GitHub. ההדרכה תתמקד בדרך להאיץ את תכנון השבב באמצעות אפליקציות Synopsys Cloud GitHub, ומתודולוגיית Agile CI/CD שהובאה מעולמות התוכנה וצינורות עבודה אוטומטיים (Continuous Integration / Continuous Deployment). המעבר ל-Agile CI/CD נועד להאיץ את זמן היציאה לשוק ולשפר את איכות התכנון.
Hardware teams are moving to GitHub, CI/CD, and Pull Request-driven workflows, but EDA tools often sit outside that loop – breaking collaboration and slowing agentic automation. This Synopsys webinar demonstrates how Synopsys Cloud GitHub Apps bring chip design and verification flows directly into GitHub events such as pull requests, pushes, and slash commands.
See how EDA runs as ephemeral cloud workloads with results posted back as PR checks and comments, enabling continuous verification without leaving GitHub. We’ll also cover security models for IP-sensitive environments and how GitHub-native EDA unlocks agent-driven workflows where AI can trigger, interpret, and act on design tool results – closing the gap between software-style hardware development and traditional EDA execution.
Speakers:
Achim Nohl (left) is a Distinguished Architect at Synopsys, where he co-architects and develops the Synopsys Cloud platform. With over 25 years of experience spanning EDA, embedded systems, and cloud-native architecture, his career has evolved from processor design and prototyping all the way to SaaS platform development. He holds multiple patents in Embedded Processor Design Automation, was part of the founding team of LISATek in 2000.
Varun Shah (right) is on the product management team of Synopsys Cloud, responsible for technology roadmap and cloud enablement of EDA software. Prior to joining the cloud team, Varun was in Application Engineering for design verification software for over a decade. Varun holds a master's degree in electrical engineering and is a certified product management professional from the Kellogg School of Management.
במסגרת הוובינר בשם 
As power integrity challenges increase with advanced nodes and multi-die architectures, EMIR analysis must evolve beyond traditional signoff. In this Synopsys webinar, we will show how RedHawk-SC is expanding its capabilities not only to enhance EMIR analysis, but also to enable IR-aware Static Timing Analysis (IR-STA) and IR-driven ECO (IR-ECO) flows.
Speaker: Diwakar Kumaraswamy, Technical Product Manager at Synopsys with over 15 years of experience in SoC design and high-speed interconnects. He specializes in PCIe architecture for AI and HPC, supporting next-generation connectivity solutions for advanced infrastructure.
Key benefits of migrating to PCIe 5.0
Speaker: Jim Schultz, senior staff product manager for the Synopsys EDA Group. He holds a B.S. in electrical engineering from the University of California, Davis with an emphasis in electromagnetics. His design engineering experience includes physical verification, design planning and design implementation on CPUs, networking and security chips. As a product engineer, he has supported design implementation, design planning and package design at various EDA companies.
